Publications on FIB Circuit Edit, Ebeam Probing, and Nanomachining

  1. Milling High Aspect Ratio (HAR) Holes in Dielectrics: VV Makarov, RK Jain and Ted Lundquist:EFUG/ESREF 2005
  2. Role of Circuit Edit in Post-Silicon Debug and Diagnosis: T. Malik, RK Jain, R. Nicholson, TR Lundquist: SDD 2005
  3. Novel and Practical Method of Through Silicon FIB Editing SOI Devices: RK Jain, TR Lundquist, M Antolik, M Thompson; ISTFA 2005
  4. Nano Patterning using a Coaxial Photon-Ion Column: RK Jain, Emiliano Faraoni; NanoFIB 2005
  5. FIB Etching of Copper with Minimal Impact on Neighboring Circuitry including Dielectric: K. Ng, S. Motegi, RK Jain, TR Lundquist, VV Makarov; IPFA 2005
  6. Design ECO Validation of 90nm Copper Devices Through the Silicon Backside: CC Tsao, TT Miau, RK Jain, TR Lundquist, P Vedagarbha; Electronics Manufaturing; Nov-Dec 2004
  7. Backside Circuit Edit on Device Level - New Methodologies of Contacting Circuit Nodes: RK Jain, T Malik, T Lundquist, R Schlangen, U. Kerst, C. Boit; EFUG/ESREF 2006
  8. Image Processing for Improved Visulatization & Endpoint Detection: T Lundquist, D Renard, RK Jain, M Phaneuf, K Lagarec; EFUG/ESREF 2006
  9. Advanced Fringe Analysis Techniques: RK Jain, T Malik, TR Lundquist, CC Tsao, WJ Walecki; ISTFA 2006
  10. 回路修正のトレンチ加工時に観察される干渉縞の解析: S.Motegi, RK Jain, T Malik, TR Lundquist, CC Tsao; LSI Testing Symposium 2006
  11. New Circuit Edit and Probing Options directly to FET Device on Ultra
    Thin Silicon Backside processed by Focused Ion Beam: R. Schlangen, U. Kerst, C. Boit, RK Jain, T. Malik, T. Lundquist; SDD 07
  12. Novel Flip-Chip Probing Methodology Using Electron Beam Probing: R.K. Jain, T. Malik, T. Lundquist, R. Schlangen, R. Leihkauf, U. Kerst, C. Boit; IPFA 2007
  13. Non Destructive 3D Chip Inspection with Nano Scale Potential by use of Backside FIB and Backscattered Electron Microscopy: R. Schlangen, U. Kerst. C. Boit, T. Malik, RK Jain, T. Lundquist; ESREF 2007
  14. FIB backside circuit modification on device level allowing to access every Circuit node with minimum impact on device performance by use of Atomic Force Probing: R. Schlangen, U. Kerst. C. Boit, T. Malik, RK Jain, T. Lundquist, S. Schömann, B. Krüger; ISTFA 2007
  15. Deposition of Narrow, High Quality, Closely  Spaced, but  Isolated  Conductors:  VV Makarov, RK Jain; ISTFA 2007
  16. Effects of Backside Circuit Edit on Transistor Characteristics: RK Jain, T Malik, TR Lundquist, QS Wang, R. Schlangen, U. Kerst, C. Boit; ISTFA 2007
  17. Backside E-beam Probing on Nano Scale Devices: R. Schlangen, U. Kerst, C. Boit, RK Jain, T. Lundquist, B. Krüger
  18. Characterization of Low Resistivity FIB Edit Via Filling for Analog Applications: S. Motegi, RK Jain,  VV Makarov; LSI Testing  symposium '07
  19. Effect of Backside, Through Si, Editing on Performance of Transistors: H. Tanaka, RK Jain, T. Lundquist, S. Wang;  LSI Testing Symposium '07
  20. D. K. Chan and S. F. Misquitta, "Focused Ion Beam Analysis of Thermal Asperities in MR Hard Disk Drives," Datatech, 3, 129, 1999.
  21. D. K. Chan, S. F. Misquitta, J. F. Ying, C. C. Martner, and B. D. Hermsmeier, "Chemical Depth Profiling on Submicron Regions: a Combined Focused Ion Beam/Scanning Electron Microscope Approach," Surface and Interface Analysis, 27, 199, 1999.
  22. M. Antolik, S. Misquitta, T. Lundquist, "Recent Advances in the Direct Mechanical Micro-Probing of IC Transistors, ", LSI Testing& Symposium, Osaka , Japan , 2000.
  23. V. V. Makarov, L. Krasnobayev, S. Misquitta, “Novel Dielectric Etch Chemistry for the next generation of Circuit Edit : Delicate to Low-k Dielectrics and Silicon”, ISTFA 2009.